1. Field of the Invention
The present invention relates to watch dog timer circuit for generating a reset pulse for restoring a central processing unit, such as a microcomputer, (hereinafter "CPU") from a runaway condition.
2. Description of the Prior Art
If a CPU for controlling a machine or the essential part thereof becomes out of control for some reason, the controlled machine can be runaway causing a severe personal injury or mechanical damage. For this reason, such a microcomputer controlled machine is designed to generate a pulse for each time that the CPU has processed a predetermined number of steps for monitoring the operation. If the period of the pulse is below a tolerance limit, it is determined that the CPU operates normally. If the pulse period falls beyond the tolerance limit, on the other hand, it is determined that the CPU is out of control, and a watch dog timer circuit generates a reset pulse for restoring the CPU to the normal condition (usually the initial condition). The watch dog timer circuit includes a timer which times up when the pulse from the CPU does not fall below the tolerance limit and outputs a reset pulse of a predetermined pulse width.
The conventional watch dog timer circuit, however, detects whether the pulse from the CPU extends beyond the upper limit of a tolerance range so that it is impossible to detect any runaway condition which falls below the lower limit of the tolerance range. Thus, it has been proposed to provide a second timer for detecting a runaway condition below the lower limit of the tolerance range so that if the pulse falls outside the tolerance range, a reset pulse is generated to restore the microcomputer to the normal condition. However, such a structure requires two timer sets.